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This commit is contained in:
Jorgen Kragh Jakobsen
2020-04-24 14:47:43 +02:00
Unverified
parent 7112c709ad
commit fb83ae5529
5 changed files with 111 additions and 105 deletions
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126
components/MerusAudio/MerusAudio.c
View File

@@ -1,13 +1,13 @@
//
// MA120x0P ESP32 Driver
// MA120x0P ESP32 Driver
//
// Merus Audio - September 2018
// Written by Joergen Kragh Jakobsen, jkj@myrun.dk
//
// Register interface thrugh I2C for MA12070P and MA12040P
// Register interface thrugh I2C for MA12070P and MA12040P
// Support a single amplifier/i2c address
//
//
//
//
#include <stdio.h>
#include <stdint.h>
@@ -20,9 +20,9 @@
//#include "ma120_rev1_all.h"
#define MA_NENABLE_IO CONFIG_MA120X0_NENABLE_PIN
#define MA_ENABLE_IO CONFIG_MA120X0_ENABLE_PIN
#define MA_NMUTE_IO CONFIG_MA120X0_NMUTE_PIN
#define MA_NENABLE_IO CONFIG_MA120X0_NENABLE_PIN
#define MA_ENABLE_IO CONFIG_MA120X0_ENABLE_PIN
#define MA_NMUTE_IO CONFIG_MA120X0_NMUTE_PIN
#define MA_NERR_IO CONFIG_MA120X0_NERR_PIN
#define MA_NCLIP_IO CONFIG_MA120X0_NCLIP_PIN
@@ -64,26 +64,26 @@ void setup_ma120x0()
io_conf.pull_up_en = 0;
gpio_config(&io_conf);
gpio_set_level(MA_NMUTE_IO, 0);
gpio_set_level(MA_NENABLE_IO, 1);
i2c_master_init();
gpio_set_level(MA_NENABLE_IO, 0);
uint8_t res = ma_read_byte(MA120X0_ADDR,1,MA_hw_version__a);
printf("Hardware version: 0x%02x\n",res);
ma_write_byte(MA120X0_ADDR,1,MA_i2s_format__a,8); // Set i2s left justified, set audio_proc_enable
ma_write_byte(MA120X0_ADDR,1,MA_vol_db_master__a,0x50); // Set vol_db_master
ma_write_byte(MA120X0_ADDR,1,MA_vol_db_master__a,0x50); // Set vol_db_master
res = ma_read_byte(MA120X0_ADDR,1,MA_error__a);
res = ma_read_byte(MA120X0_ADDR,1,MA_error__a);
printf("Errors : 0x%02x\n",res);
res = 01; // get_MA_audio_in_mode_mon();
printf("Audio in mode : 0x%02x\n",res);
printf("Clear errors\n");
ma_write_byte(MA120X0_ADDR,1,45,0x34);
ma_write_byte(MA120X0_ADDR,1,45,0x30);
@@ -93,7 +93,7 @@ void setup_ma120x0()
printf("Unmute\n");
}
void setup_ma120()
void setup_ma120()
{
gpio_config_t io_conf;
@@ -102,17 +102,17 @@ void setup_ma120()
io_conf.pin_bit_mask = (1ULL<<MA_ENABLE_IO | 1ULL<<MA_NMUTE_IO );
io_conf.pull_down_en = 0;
io_conf.pull_up_en = 0;
printf("setup output %d %d \n",MA_ENABLE_IO, MA_NMUTE_IO);
gpio_config(&io_conf);
io_conf.intr_type = GPIO_PIN_INTR_DISABLE;
io_conf.mode = GPIO_MODE_INPUT;
io_conf.pin_bit_mask = (1ULL<<MA_NCLIP_IO | 1ULL<<MA_NERR_IO );
io_conf.pull_down_en = 0;
io_conf.pull_up_en = 0;
printf("setup input %d %d \n",MA_NCLIP_IO, MA_NERR_IO);
gpio_config(&io_conf);
@@ -121,52 +121,52 @@ void setup_ma120()
gpio_set_level(MA_ENABLE_IO, 0);
i2c_master_init();
gpio_set_level(MA_ENABLE_IO, 1);
uint8_t res = ma_write_byte(0x20,2,1544,0);
res = ma_read_byte(0x20,2,1544);
res = ma_read_byte(0x20,2,1544);
printf("Hardware version: 0x%02x\n",res);
printf("Scan I2C bus: ");
for (uint8_t addr = 0x20; addr <= 0x23 ; addr++ )
{ res = ma_read_byte(addr,2,0);
printf(" 0x%02x => GEN2 ,",addr);
//printf("Scan i2c address 0x%02x read address 0 : 0x%02x \n", addr ,res);
}
printf("\n");
uint8_t rxbuf[32];
uint8_t otp[1024];
uint8_t rxbuf[32];
uint8_t otp[1024];
for (uint8_t i=0;i<16; i++)
{ ma_read(0x20,2,0x8000+i*32,rxbuf,32);
//printf("%04x : ",0x8000+i*32 );
for (uint8_t j=0; j<32 ; j++ )
{ otp[i*32+j] = rxbuf[j];
}
}
}
for (uint16_t i=0;i<16*32; i++)
{ if (i%32==0) {
printf("\n0x%04x : ",0x8000+i);
printf("\n0x%04x : ",0x8000+i);
}
printf("%02x ",otp[i]);
}
}
res = ma_write_byte(0x20,2,0x060c,0);
res = ma_read_byte(0x20,2,0x060c);
res = ma_read_byte(0x20,2,0x060c);
printf("\nHardware version: 0x%02x\n",res);
printf("\n");
}
uint8_t b[32];
#define CHECK(ADDR,L) ma_read(0x20,2,ADDR,b,L); printf("Check 0x%04x :",ADDR); for (int ci=0;ci<L;ci++) printf(" 0x%02x",b[ci]); printf("\n");
uint8_t b[32];
#define CHECK(ADDR,L) ma_read(0x20,2,ADDR,b,L); printf("Check 0x%04x :",ADDR); for (int ci=0;ci<L;ci++) printf(" 0x%02x",b[ci]); printf("\n");
void ma120_setup_audio(uint8_t i2c_addr)
{ uint8_t cmd[32];
//system("$SCOM w 0x0003 0x50 0x50 0x02");
{ uint8_t cmd[32];
//system("$SCOM w 0x0003 0x50 0x50 0x02");
cmd[0] = 0x50;
cmd[1] = 0x50;
cmd[2] = 0x02;
ma_write(i2c_addr,2,0x0003,cmd,3);
//CHECK(0x0003,3);
//CHECK(0x0003,3);
//system("$SCOM w 0x0015 0x12");
ma_write_byte(i2c_addr,2,0x0015, 0x12);
//CHECK(0x0015,1);
@@ -180,26 +180,26 @@ void ma120_setup_audio(uint8_t i2c_addr)
ma_write(i2c_addr,2,0x003d,cmd,2);
//CHECK(0x003d,2);
//system("$SCOM w 0x0040 0xf0 0x03");
cmd[0] = 0xf0;
cmd[0] = 0xf0;
cmd[1] = 0x03;
ma_write(i2c_addr,2,0x0040,cmd,2);
//CHECK(0x0040,2);
//system("$SCOM w 0x0043 0xf0 0x07");
cmd[0] = 0xf0;
cmd[0] = 0xf0;
cmd[1] = 0x07;
ma_write(i2c_addr,2,0x0043,cmd,2);
//CHECK(0x0043,2);
//system("$SCOM w 0x0079 0x9b");
ma_write_byte(i2c_addr,2,0x0079, 0x9b);
//CHECK(0x0079,1);
//system("$SCOM w 0x008e 0xef");
ma_write_byte(i2c_addr,2,0x008e, 0xef);
//CHECK(0x008e,1);
//system("$SCOM w 0x0090 0x20 0x32 0x45");
cmd[0] = 0x20;
cmd[1] = 0x32;
cmd[1] = 0x32;
cmd[2] = 0x45;
ma_write(i2c_addr,2,0x0090,cmd,3);
//CHECK(0x0090,3);
@@ -207,8 +207,8 @@ void ma120_setup_audio(uint8_t i2c_addr)
ma_write_byte(i2c_addr,2,0x00c0, 0x7c);
//CHECK(0x00c0,1);
//system("$SCOM w 0x00c3 0x07 0xff");
cmd[0] = 0x07;
cmd[1] = 0xff;
cmd[0] = 0x07;
cmd[1] = 0xff;
ma_write(i2c_addr,2,0x00c3,cmd,2);
//CHECK(0x00c3,2);
@@ -217,14 +217,14 @@ void ma120_setup_audio(uint8_t i2c_addr)
//CHECK(0x00d9,1);
//------------- not imp
//system("$SCOM w 0x00f0 0x00 0x00");
cmd[0] = 0x00;
cmd[1] = 0x00;
cmd[0] = 0x00;
cmd[1] = 0x00;
ma_write(i2c_addr,2,0x00f0,cmd,2);
//CHECK(0x00f0,2);
//system("$SCOM w 0x010f 0x0f 0x0f 0x64");
cmd[0] = 0x0f;
cmd[0] = 0x0f;
cmd[1] = 0x0f;
cmd[2] = 0x64;
cmd[2] = 0x64;
ma_write(i2c_addr,2,0x010f,cmd,3);
//CHECK(0x010f,3);
//system("$SCOM w 0x0140 0x5c");
@@ -232,16 +232,16 @@ void ma120_setup_audio(uint8_t i2c_addr)
//CHECK(0x0140,1);
//system("$SCOM w 0x0152 0x00 0x77 0x00");
cmd[0] = 0x00;
cmd[0] = 0x00;
cmd[1] = 0x77;
cmd[2] = 0x00;
cmd[2] = 0x00;
ma_write(i2c_addr,2,0x0152,cmd,3);
//CHECK(0x0152,3);
//system("$SCOM w 0x025d 0x0a");
ma_write_byte(i2c_addr,2,0x025d, 0x0a);
//CHECK(0x025d,1);
//system("$SCOM w 0x025f 0x4d");
ma_write_byte(i2c_addr,2,0x025f, 0x4d);
//CHECK(0x025f,1);
@@ -249,7 +249,7 @@ void ma120_setup_audio(uint8_t i2c_addr)
//system("$SCOM w 0x050b 0x3f");
ma_write_byte(i2c_addr,2,0x050b, 0x3f);
//CHECK(0x050b,1);
const char dsp0[16] = {0x10 ,0x00 ,0x40 ,0x00 ,0x13 ,0xb6 ,0x40 ,0x00 ,0x13 ,0x47 ,0x41 ,0x00 ,0x15 ,0x06 ,0x00 ,0x00};
const char dsp1[16] = {0x15 ,0x17 ,0x00 ,0x00 ,0x15 ,0x47 ,0x40 ,0x00 ,0x13 ,0x56 ,0x41 ,0x00 ,0x13 ,0x67 ,0x41 ,0x00};
const char dsp2[16] = {0x15 ,0x26 ,0x00 ,0x00 ,0x15 ,0x37 ,0x00 ,0x00 ,0x13 ,0x76 ,0x41 ,0x00 ,0x13 ,0x87 ,0x41 ,0x00};
@@ -262,41 +262,41 @@ void ma120_setup_audio(uint8_t i2c_addr)
//CHECK(0x1010,16);
//CHECK(0x1020,16);
//CHECK(0x1030,16);
//system("$SCOM w 0x1000 0x10 0x00 0x40 0x00 0x13 0xb6 0x40 0x00 0x13 0x47 0x41 0x00 0x15 0x06 0x00 0x00");
//system("$SCOM w 0x1010 0x15 0x17 0x00 0x00 0x15 0x47 0x40 0x00 0x13 0x56 0x41 0x00 0x13 0x67 0x41 0x00");
//system("$SCOM w 0x1020 0x15 0x26 0x00 0x00 0x15 0x37 0x00 0x00 0x13 0x76 0x41 0x00 0x13 0x87 0x41 0x00");
//system("$SCOM w 0x1030 0x15 0x46 0x00 0x00 0x15 0x57 0x00 0x00 0x10 0x30 0x40 0x00");
printf("Audio setup done\n");
ma_write_byte(0x20,2,0x608,0x33);
ma_write_byte(0x20,2,0x609,0);
ma_write_byte(0x20,2,0x609,0);
// ma_write_byte(0x20,2,513,0x11);
//ma_write_byte(i2c_addr,2,MA_core__test__d1_mux_sel__a, 0x03);
gpio_set_level(MA_NMUTE_IO, 0);
}
//var sys_err1_str = ['X','X','DSP3','DSP2','DSP1','DSP0','ERR','PVT_low'];
//var sys_err0_str = ['TW','AUD','CLK','PV_ov','PV_low','PV_uv','OTE','OTW'];
//const char * syserr1_str = { "X", "X", "DSP3","DSP2","DSP1","DSP0","ERR","PVT_low" } ;
//const char * syserr1_str = { "X", "X", "DSP3","DSP2","DSP1","DSP0","ERR","PVT_low" } ;
//const char * syserr0_str = { "TW","AUD","CLK","PV_ov","PV_low","PV_uv","OTE","OTW" } ;
void ma120_read_error(uint8_t i2c_addr)
{ //0x0118 error now ch0 [clip_stuck dc vcf_err ocp_severe ocp]
//0x0119 error now ch1 [clip_stuck dc vcf_err ocp_severe ocp]
{ //0x0118 error now ch0 [clip_stuck dc vcf_err ocp_severe ocp]
//0x0119 error now ch1 [clip_stuck dc vcf_err ocp_severe ocp]
//0x011a error now system [ AE CE ... ]
//0x011b error now system [DSP3 DSP2 DSP1 DSP0 OC OE]
//0x011c error acc ch0 [clip_stuck dc vcf_err ocp_severe ocp]
//0x011d error acc ch1 [clip_stuck dc vcf_err ocp_severe ocp]
//0x011c error acc ch0 [clip_stuck dc vcf_err ocp_severe ocp]
//0x011d error acc ch1 [clip_stuck dc vcf_err ocp_severe ocp]
//0x011e error acc system [7..0]
//0x011f error acc system [13..8]
uint8_t rxbuf[10] = {0};
char * l1;
uint8_t rxbuf[10] = {0};
char * l1;
l1 = malloc(40);
uint8_t res = 0xff ; // ma_read(i2c_addr,2,MA_core__prot_sys__errVect_now__errVector_ch0__a,rxbuf,8);
//for (int i = 0; i<=7;i++)
//{
//{
// printf("%d %s",i,((rxbuf[2] & (1<<i))==(1<<i)) ? sysstr0_str[i] : " ");
//}
@@ -304,9 +304,9 @@ void ma120_read_error(uint8_t i2c_addr)
printf("\nError vectors :");
for (int i = 0; i<8; i++)
{ printf("%02x ", rxbuf[i]);
}
}
printf("\n");
}
void i2c_master_init()
@@ -337,7 +337,7 @@ esp_err_t ma_write( uint8_t i2c_addr,uint8_t prot, uint16_t address, uint8_t *wb
{
i2c_master_write_byte(cmd, (uint8_t) address, ACK_VAL);
}
for (int i=0 ; i<n ; i++)
{ if (i==n-1) ack = NACK_VAL;
i2c_master_write_byte(cmd, wbuf[i], ack);

19
components/dsp_processor/dsp_processor.c
View File

@@ -30,13 +30,13 @@ void setup_dsp_i2s(uint32_t sample_rate)
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, //2-channels
.communication_format = I2S_COMM_FORMAT_I2S_MSB,
.dma_buf_count = 8, // 8
.dma_buf_len = 480, //512,
.dma_buf_len = 512, //512,
//.intr_alloc_flags = 1, //Default interrupt priority
.use_apll = true,
.fixed_mclk = 0,
.tx_desc_auto_clear = true //Auto clear tx descriptor on underflow
};
i2s_config_t i2s_config1 = {
.mode = I2S_MODE_SLAVE | I2S_MODE_TX, // Only TX
.sample_rate = sample_rate,
@@ -51,14 +51,14 @@ void setup_dsp_i2s(uint32_t sample_rate)
.tx_desc_auto_clear = true //Auto clear tx descriptor on underflow
};
i2s_driver_install(0, &i2s_config0, 4, &i2s_queue);
i2s_driver_install(0, &i2s_config0, 7, &i2s_queue);
//i2s_driver_install(1, &i2s_config1, 4, &i2s_queue);
i2s_zero_dma_buffer(0);
//i2s_zero_dma_buffer(1);
i2s_pin_config_t pin_config0 = {
.bck_io_num = 12, //CONFIG_EXAMPLE_I2S_BCK_PIN,
.bck_io_num = 23, // 12, //CONFIG_EXAMPLE_I2S_BCK_PIN,
.ws_io_num = 13, //CONFIG_EXAMPLE_I2S_LRCK_PIN,
.data_out_num = 14, //CONFIG_EXAMPLE_I2S_DATA_PIN,
.data_in_num = -1 //Not used
@@ -107,16 +107,21 @@ static void dsp_i2s_task_handler(void *arg)
}
uint8_t *data_ptr = audio;
for (uint16_t i=0;i<len;i++)
/*for (uint16_t i=0;i<len;i++)
{
sbuffer0[i] = ((float) ((int16_t) (audio[i*4+1]<<8) + audio[i*4+0]))/32768;
sbuffer1[i] = ((float) ((int16_t) (audio[i*4+3]<<8) + audio[i*4+2]))/32768;
sbuffer2[i] = ((sbuffer0[i]/2) + (sbuffer1[i]/2));
}
*/
switch (dspFlow) {
case dspfStereo :
{ for (uint16_t i=0; i<len; i++)
{ if (cnt%100==0)
{ ESP_LOGI("I2S", "In dspf Stero :%d",chunk_size);
//ws_server_send_bin_client(0,(char*)audio, 240);
//printf("%d %d \n",byteWritten, i2s_evt.size );
}
for (uint16_t i=0; i<len; i++)
{ audio[i*4+0] = (muteCH[0] == 1)? 0 : audio[i*4+0];
audio[i*4+1] = (muteCH[0] == 1)? 0 : audio[i*4+1];
audio[i*4+2] = (muteCH[1] == 1)? 0 : audio[i*4+2];

63
main/main.c
View File

@@ -42,7 +42,7 @@ xQueueHandle i2s_queue;
/* Constants that aren't configurable in menuconfig */
#define HOST "192.168.1.158"
#define PORT 1704
#define BUFF_LEN 6000
#define BUFF_LEN 4000
/* Logging tag */
static const char *TAG = "SNAPCAST";
@@ -153,20 +153,20 @@ static void http_get_task(void *pvParameters)
last_time_sync.tv_sec = 0;
last_time_sync.tv_usec = 0;
id_counter = 0;
OpusDecoder *decoder;
//int size = opus_decoder_get_size(2);
int oe = 0;
decoder = opus_decoder_create(48000,2,&oe);
// int error = opus_decoder_init(decoder, 48000, 2);
//printf("Initialized Decoder: %d", oe);
int16_t *audio = (int16_t *)malloc(960*2*sizeof(int16_t));
int16_t pcm_size = 120;
//printf("Initialized Decoder: %d", oe);
int16_t *audio = (int16_t *)malloc(960*1*sizeof(int16_t));
int16_t pcm_size = 120;
uint16_t channels;
dsp_i2s_task_init(48000);
while(1) {
/* Wait for the callback to set the CONNECTED_BIT in the
event group.
@@ -287,7 +287,7 @@ static void http_get_task(void *pvParameters)
size += result;
}
switch (base_message.type) {
case SNAPCAST_MESSAGE_CODEC_HEADER:
result = codec_header_message_deserialize(&codec_header_message, start, size);
@@ -297,13 +297,13 @@ static void http_get_task(void *pvParameters)
}
ESP_LOGI(TAG, "Received codec header message\r\n");
size = codec_header_message.size;
start = codec_header_message.payload;
ESP_LOGI(TAG, "Codec : %s , Size: %d \n",codec_header_message.codec,size);
uint32_t rate;
memcpy(&rate, start+4,sizeof(rate));
memcpy(&rate, start+4,sizeof(rate));
uint16_t bits;
memcpy(&bits, start+8,sizeof(bits));
//uint16_t channels;
@@ -311,10 +311,10 @@ static void http_get_task(void *pvParameters)
ESP_LOGI(TAG, "Opus sampleformat: %d:%d:%d\n",rate,bits,channels);
int error = 0;
decoder = opus_decoder_create(rate,channels,&error);
if (error != 0)
if (error != 0)
{ ESP_LOGI(TAG, "Failed to init opus coder"); }
ESP_LOGI(TAG, "Initialized opus Decoder: %d", error);
codec_header_message_free(&codec_header_message);
received_header = true;
@@ -333,24 +333,24 @@ static void http_get_task(void *pvParameters)
//ESP_LOGI(TAG, "Received wire message\r\n");
size = wire_chunk_message.size;
start = wire_chunk_message.payload;
start = wire_chunk_message.payload;
//ESP_LOGI(TAG, "size : %d\n",size);
int frame_size = 0;
int frame_size = 0;
while ((frame_size = opus_decode(decoder, (unsigned char *)start, size, (opus_int16*)audio,
pcm_size/channels, 0)) == OPUS_BUFFER_TOO_SMALL)
{ pcm_size = pcm_size * 2;
ESP_LOGI(TAG, "OPUS encoding buffer too small, resizing to %d samples per channel", pcm_size/channels);
}
ESP_LOGI(TAG, "OPUS encoding buffer too small, resizing to %d samples per channel", pcm_size/channels);
}
if (frame_size < 0 )
{ ESP_LOGE(TAG, "Decode error : %d \n",frame_size);
} else
{
{ ESP_LOGE(TAG, "Decode error : %d \n",frame_size);
} else
{
write_ringbuf(audio,size*4*sizeof(uint16_t));
}
wire_chunk_message_free(&wire_chunk_message);
break;
case SNAPCAST_MESSAGE_SERVER_SETTINGS:
// The first 4 bytes in the buffer are the size of the string.
// We don't need this, so we'll shift the entire buffer over 4 bytes
@@ -364,7 +364,7 @@ static void http_get_task(void *pvParameters)
}
ESP_LOGI(TAG, "Setting volume: %d", server_settings_message.volume);
uint8_t cmd[4];
uint8_t cmd[4];
cmd[0] = 128-server_settings_message.volume ;
cmd[1] = cmd[0];
ma_write(0x20,1,0x0040,cmd,1);
@@ -454,7 +454,10 @@ void set_time_from_sntp() {
ESP_LOGI(TAG, "Initializing SNTP");
sntp_setoperatingmode(SNTP_OPMODE_POLL);
sntp_setservername(0, "pool.ntp.org");
sntp_init();
sntp_setservername(1, "europe.pool.ntp.org");
sntp_setservername(2, "uk.pool.ntp.org ");
sntp_setservername(3, "us.pool.ntp.org");
sntp_init();
// wait for time to be set
time_t now = 0;
@@ -477,22 +480,22 @@ void set_time_from_sntp() {
}
void app_main(void)
{
{
esp_err_t ret = nvs_flash_init();
if (ret == ESP_ERR_NVS_NO_FREE_PAGES || ret == ESP_ERR_NVS_NEW_VERSION_FOUND) {
ESP_ERROR_CHECK(nvs_flash_erase());
ret = nvs_flash_init();
}
ESP_ERROR_CHECK(ret);
ESP_ERROR_CHECK(ret);
//setup_ma120();
//ma120_setup_audio(0x20);
setup_ma120x0();
//setup_rtp_i2s();
wifi_init_sta();
uint8_t base_mac[6];
// Get MAC address for WiFi station
esp_read_mac(base_mac, ESP_MAC_WIFI_STA);
@@ -508,7 +511,7 @@ void app_main(void)
while (1) {
//audio_event_iface_msg_t msg;
vTaskDelay(2000/portTICK_PERIOD_MS);
esp_err_t ret = 0; //audio_event_iface_listen(evt, &msg, portMAX_DELAY);
if (ret != ESP_OK) {
ESP_LOGE(TAG, "[ * ] Event interface error : %d", ret);

2
sdkconfig
View File

@@ -81,7 +81,7 @@ CONFIG_BOOTLOADER_RESERVE_RTC_SIZE=0
#
# Serial flasher config
#
CONFIG_ESPTOOLPY_PORT="/dev/ttyUSB3"
CONFIG_ESPTOOLPY_PORT="/dev/ttyUSB0"
# CONFIG_ESPTOOLPY_BAUD_115200B is not set
CONFIG_ESPTOOLPY_BAUD_230400B=y
# CONFIG_ESPTOOLPY_BAUD_921600B is not set

6
sdkconfig.old
View File

@@ -442,10 +442,8 @@ CONFIG_ESP32_WIFI_STATIC_TX_BUFFER=y
CONFIG_ESP32_WIFI_TX_BUFFER_TYPE=0
CONFIG_ESP32_WIFI_STATIC_TX_BUFFER_NUM=16
# CONFIG_ESP32_WIFI_CSI_ENABLED is not set
CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED=y
CONFIG_ESP32_WIFI_TX_BA_WIN=6
CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED=y
CONFIG_ESP32_WIFI_RX_BA_WIN=6
# CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED is not set
# CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED is not set
CONFIG_ESP32_WIFI_NVS_ENABLED=y
CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0=y
# CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_1 is not set